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? kemet electronics corporation ? p.o. box 5928 ? greenville, sc 29606 ? 864-963-6300 ? www.kemet.com c10 35_c0g_pulse_smd ? 8/2/2016 1 ordering information c 2824 h 393 k u g w c tu ceramic case size (l" x w") specifcation/ series capacitance code (pf) capacitance tolerance dielectric withstanding voltage (vdc) 1 dielectric failure rate/ design termination finish 2 packaging/ grade (c-spec) 3 2824 3040 3640 4540 h = high temp (200c) two signifcant digits + number of zeros j = 5% k = 10% m = 20% d = 1,000 u = 1,250 g = 2,000 h = 3,000 v = 3,500 g = c0g w = pulse discharge c = 100% matte sn l = snpb (5% pb minimum) see packaging c-spec ordering options table below 1 dwv is the voltage a capacitor can withstand (survive) for a short period of time. it exceeds the nominal and continuous working voltage of the capacitor. see waterfall table for working voltage. 2 additional termination fnish options may be available. contact kemet for details. 3 additional reeling or packaging options may be available. contact kemet for details. overview kemets industrial grade pulse discharge series surface mount capacitors in c0g dielectric deliver reliable high voltage and high temperature performance required for operation in harsh environments, specifcally discharge circuitry. constructed of a robust and proprietary base metal electrode (bme) dielectric system, these devices offer industry-leading performance relative to capacitance and case size. kemet pulse discharge capacitors average greater than 30% higher breakdown voltage than competitive precious metal electrode (pme) devices with similar capacitance & voltage ratings. designed for down-hole oil exploration and perforation, these devices feature a 200c maximum operating temperature. the electronics industries alliance (eia) characterizes c0g dielectric as a class i material. components of this classifcation are temperature compensating and are suited for resonant circuit applications or those where q and stability of capacitance characteristics are required. pulse discharge series capacitors in c0g dielectric exhibit no change in capacitance with respect to time and voltage and boast a negligible change in capacitance with reference to ambient temperature. these devices retain high insulation resistance with low dissipation factor at elevated temperatures up 200c. kemets pulse discharge surface mount mlccs are manufactured in state-of-the-art iso/ts 16949:2009 certifed facilities and are proven to function reliably in harsh, high temperature and high humidity, down-hole environments. surface mount multilayer ceramic chip capacitors (smd mlccs) pulse discharge, high voltage, high temperature 200c c0g dielectric, 1,000 vdc C 3,500 vdc (industrial grade) one world. one kemet
? kemet electronics corporation ? p.o. box 5928 ? greenville, sc 29606 ? 864-963-6300 ? www.kemet.com c10 35_c0g_pulse_smd ? 8/2/2016 2 packaging c-spec ordering options table packaging type/options 1 packaging ordering code (c-spec) 2 7" reel (embossed plastic tape)/unmarked tu 13" reel (embossed plastic tape)/unmarked 7210 reel (embossed plastic tape)/unmarked C 50 pieces t050 reel (embossed plastic tape)/unmarked C 100 pieces t100 reel (embossed plastic tape)/unmarked C 250 pieces t250 reel (embossed plastic tape)/unmarked C 500 pieces t500 reel (embossed plastic tape)/unmarked C 1,000 pieces t1k0 1 the terms marked and unmarked pertain to laser marking option of components. all packaging options labeled as unmarked will contain capacitors that have not been laser marked. the option to laser mark is not available on these devices. 2 reeling quantities are dependent upon chip size and thickness dimension. when ordering using the txxx packaging ordering codes (c-specs) outlined above, product may be shipped on multiple 7 reels or a single 13 reel. additional reeling or packaging options may be available. contact kemet for details. benefts operating temperature range of 55c to 2c ? lea d (pb)-free, rohs and reach compliant u &ew iqixepxiglrspsk u ,mk liv9:&(getefmpmxxlergsqtixmxmihmipigxvmg technologies ? cap acitance offerings ranging from 2.2 nf up to 150 nf ? ava ilable capacitance tolerances of 5%, 10% or 20% u )xv iqipps)76erh)70 u ,mk lxlivqepwxefmpmx u ,mk lvmttpigyvvirxgetefmpmx ? no ca pacitance change with respect to applied rated dc voltage ? neg ligible capacitance change with respect to temperature jvsqqxsq u 2sge tegmxergihigemxlxmqi ? non -polar device, minimizing installation concerns u tyviqexxixmrtpexihxivqmrexmsrrmwleppsmrkjsv igippirxwsphivefmpmx applications 8tmgepettpmgexmsrwmrgpyhilmklxiqtivexyvihmwglevkigmvgymxwsvqyrmxmsrwerhhsrlspismpitpsvexmsrtivsvexmsr surface mount multilayer ceramic chip capacitors (smd mlccs) pulse discharge, high voltage, high temperature 200c c0g dielectric, 1,000 vdc C 3,500 vdc (industrial grade)
? kemet electronics corporation ? p.o. box 5928 ? greenville, sc 29606 ? 864-963-6300 ? www.kemet.com c10 35_c0g_pulse_smd ? 8/2/2016 3 dimensions C millimeters (inches) t s w l b size code l length w width t thickness maximum b bandwidth s separation minimum mounting technique 2824 7.10 0.4 0 (0.2800.016) 6.100.40 (0.2400.016) see table 2 1.270.40 (0.0500.016) n/a solder refow only 3040 7.60 0.4 0 (0.3000.016) 10.200.40 (0.4020.016) 3640 9.100.40 (0.3580.016) 10.200.40 (0.4020.016) 4540 11.400.40 (0.4490.016) 10.200.40 (0.4020.016) qualifcation/certifcation industrial grade pulse discharge products are subject to internal qualifcation. details regarding test methods and conditions are referenced in table 4, performance and reliability. environmental compliance lead (pb)-free, rohs, and reach compliant without exemptions (excluding snpb termination fnish option). surface mount multilayer ceramic chip capacitors (smd mlccs) pulse discharge, high voltage, high temperature 200c c0g dielectric, 1,000 vdc C 3,500 vdc (industrial grade)
? kemet electronics corporation ? p.o. box 5928 ? greenville, sc 29606 ? 864-963-6300 ? www.kemet.com c10 35_c0g_pulse_smd ? 8/2/2016 4 electrical parameters/characteristics item parameters/characteristics operating temperature range ?55c to +200c capacitance change with reference to +25c and 0 vdc applied (tcc) 30 ppm/oc aging rate (maximum % capacitance loss/decade hour) 0% 1 dielectric withstanding voltage (dwv) see product selection table (product waterfall) for available ratings 2 dissipation factor (df) maximum limit at 25oc 0.1% 3 insulation resistance (ir) minimum limit at 25c 1,000 megohm microfarads or 100 g (500 vdc applied for 1205 seconds at 25c) 1 dwv is the voltage a capacitor can withstand (survive) for a short period of time. it exceeds the nominal and continuous working voltage of the capacitor. 2 capacitance and dissipation factor (df) measured under the following conditions: 1 mhz 100 khz and 1.0 vrms 0.2 v if capacitance 1,000 pf 1 khz 5 0 hz and 1.0 vrms 0.2 v if capacitance > 1,000 pf 3 to obtain ir limit, divide m-f value by the capacitance and compare to g limit. select the lower of the two limits. note: when measuring capacitance it is important to ensure the set voltage level is held constant. the hp4284 and agilent e4980 have a feature known as automatic level control (alc). the alc feature should be switched to on. post environmental limits high temperature life, biased humidity, moisture resistance dielectric rated dc voltage capacitance value dissipation factor (maximum %) capacitance shift insulation resistance c0g all all 0.5 0.3% or 0.25 pf 10% of initial limit electrical characteristics discharge current vs. applied voltage 0 1,000 2,000 3,000 4,000 0 500 1,000 1,500 2,000 2,500 3,000 3,500 4,000 current (a) applied voltage (v) 150nf 1000v 100nf 1250v 68nf 2000v 27nf 3000v 18nf 3500v energy density vs. applied voltage 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0 500 1,000 1,500 2,000 2,500 3,000 energy density (j/cc) applied voltage (v) kemet ht c0g 4540 68nf competitor n2200 3640 200nf breakdown ht c0g breakdown n2200 discharge n2200 discharge ht c0g surface mount multilayer ceramic chip capacitors (smd mlccs) pulse discharge, high voltage, high temperature 200c c0g dielectric, 1,000 vdc C 3,500 vdc (industrial grade)
? kemet electronics corporation ? p.o. box 5928 ? greenville, sc 29606 ? 864-963-6300 ? www.kemet.com c10 35_c0g_pulse_smd ? 8/2/2016 5 table 1 C pulse discharge series, capacitance range waterfall these products are protected under us patents 7,172,985 and 7,670,981, other patents pending, and any foreign counterparts. capacitance cap code case size/ series c2824h c3040h c3640h c4540h voltage code d u g h v d u g h v d u g h v d u g h v dielectric withstanding voltage (dwv) 1000 1250 2000 3000 3500 1000 1250 2000 3000 3500 1000 1250 2000 3000 3500 1000 1250 2000 3000 3500 working voltage 500 630 1000 1500 2000 500 630 1000 1500 2000 500 630 1000 1500 2000 500 630 1000 1500 2000 capacitance tolerance product availability and chip thickness codes see table 2 for chip thickness dimensions 1,800 pf 182 j k m 2,000 pf 202 j k m 2,200 pf 222 j k m ta ta ta ta ta 2,700 pf 272 j k m ta ta ta ta ta 3,300 pf 332 j k m ta ta ta ta ta qb qb qb qb qb 3,900 pf 392 j k m ta ta ta ta tb qb qb qb qb qb ma ma ma ma ma 4,700 pf 472 j k m ta ta ta tb tb qb qb qb qb qb ma ma ma ma ma sa sa sa sa sa 5,600 pf 562 j k m ta ta ta tb tc qb qb qb qb qb ma ma ma ma ma sa sa sa sa sa 6,800 pf 682 j k m ta ta ta tb qb qb qb qb qc ma ma ma ma ma sa sa sa sa sa 8,200 pf 822 j k m ta ta ta tc qb qb qb qc qc ma ma ma ma mb sa sa sa sa sa 10,000 pf 103 j k m ta ta ta qb qb qb qc qd ma ma ma ma mb sa sa sa sa sb 12,000 pf 123 j k m ta ta ta qb qb qb qd ma ma ma mb mb sa sa sa sa sb 15,000 pf 153 j k m ta ta tb qb qb qb qd ma ma ma mb mc sa sa sa sb sb 18,000 pf 183 j k m ta ta tb qb qb qb ma ma ma mc sa sa sa sb sc 22,000 pf 223 j k m ta tb tc qb qb qc ma ma ma sa sa sa sb 27,000 pf 273 j k m ta tb qb qb qc ma ma ma sa sa sa sc 33,000 pf 333 j k m tb tb qb qc qc ma ma mb sa sa sa 39,000 pf 393 j k m tb tc qb qc qd ma ma mb sa sa sb 47,000 pf 473 j k m tb qb qc ma mb mc sa sa sb 56,000 pf 563 j k m tc qc qd ma mb sa sa sb 68,000 pf 683 j k m qc qd mb mc sa sb sc 82,000 pf 823 j k m qc mb sa sb 0.10 f 104 j k m qd mc sb sc 0.12 f 124 j k m mc sb 0.15 f 154 j k m sc capacitance cap code working voltage 500 630 1000 1500 2000 500 630 1000 1500 2000 500 630 1000 1500 2000 500 630 1000 1500 2000 dielectric withstanding voltage (dwv) 1000 1250 2000 3000 3500 1000 1250 2000 3000 3500 1000 1250 2000 3000 3500 1000 1250 2000 3000 3500 voltage code d u g h v d u g h v d u g h v d u g h v case size/series c2824h c3040h c3640h c4540h surface mount multilayer ceramic chip capacitors (smd mlccs) pulse discharge, high voltage, high temperature 200c c0g dielectric, 1,000 vdc C 3,500 vdc (industrial grade)
? kemet electronics corporation ? p.o. box 5928 ? greenville, sc 29606 ? 864-963-6300 ? www.kemet.com c10 35_c0g_pulse_smd ? 8/2/2016 6 table 2 C chip thickness/tape & reel packaging quantities thickness code case size thickness range (mm) paper quantity plastic quantity 7" reel 13" reel 7" reel 13" reel ta 2824 1.40 0.15 0 0 750 2,500 tb 2824 2.00 0.20 0 0 300 2,000 tc 2824 2.50 0.20 0 0 300 2,000 qb 3040 1.40 0.15 0 0 500 1,650 qc 3040 2.00 0.20 0 0 500 1,650 qd 3040 2.50 0.20 0 0 350 1,400 ma 3640 1.40 0.15 0 0 250 1,550 mb 3640 2.00 0.20 0 0 250 1,550 mc 3640 2.50 0.20 0 0 250 1,550 sa 4540 1.40 0.15 0 0 200 1,500 sb 4540 2.00 0.20 0 0 200 1,500 sc 4540 2.50 0.20 0 0 200 1,500 thickness code case size thickness range (mm) 7" reel 13" reel 7" reel 13" reel paper quantit plastic quantit package quantity based on fnished chip thickness specifcations. surface mount multilayer ceramic chip capacitors (smd mlccs) pulse discharge, high voltage, high temperature 200c c0g dielectric, 1,000 vdc C 3,500 vdc (industrial grade)
? kemet electronics corporation ? p.o. box 5928 ? greenville, sc 29606 ? 864-963-6300 ? www.kemet.com c10 35_c0g_pulse_smd ? 8/2/2016 7 table 3 C chip capacitor land pattern design recommendations per ipcC7351 size code (in.) metric size code density level a: maximum (most) land protrusion (mm) density level b: median (nominal) land protrusion (mm) density level c: minimum (least) land protrusion (mm) c y x v1 v2 c y x v1 v2 c y x v1 v2 2824 7260 3.45 1.70 6.60 9.60 7.60 3.35 1.50 6.50 8.70 7.00 3.25 1.30 6.40 8.00 6.70 3040 7610 3.70 1.70 10.70 10.10 11.70 3.60 1.50 10.60 9.20 11.10 3.50 1.30 10.50 8.50 10.80 3640 9210 4.45 1.70 10.70 11.60 11.70 4.35 1.50 10.60 10.70 11.10 4.25 1.30 10.50 10.00 10.80 4540 - 5.60 1.70 10.70 13.90 11.70 5.50 1.50 10.60 13.00 11.10 5.40 1.30 10.50 12.30 10.80 density level a: for low-density product applications. provides a wider process window for refow solder processes. density level b: for products with a moderate level of component density. provides a robust solder attachment condition for refow solder processes. density level c: for high component density product applications. before adapting the minimum land pattern variations, the user should perform qualifcation testing based on the conditions outlined in ipc standard 7351 (ipcC7351). image below based on density level b for a 3640 case size. c c x x v1 v2 grid placement courtyard y y surface mount multilayer ceramic chip capacitors (smd mlccs) pulse discharge, high voltage, high temperature 200c c0g dielectric, 1,000 vdc C 3,500 vdc (industrial grade)
? kemet electronics corporation ? p.o. box 5928 ? greenville, sc 29606 ? 864-963-6300 ? www.kemet.com c10 35_c0g_pulse_smd ? 8/2/2016 8 soldering process recommended soldering technique: ? sol der refow only recommended refow soldering profle: kemets families of surface mount multilayer ceramic capacitors (smd mlccs) are compatible with wave (single or dual), convection, ir or vapor phase refow techniques. preheating of these components is recommended to avoid extreme thermal stress. kemets recommended profle conditions for convection and ir refow refect the profle conditions of the ipc/j-std-020 standard for moisture sensitivity testing. these devices can safely withstand a maximum of three refow passes at these conditions. profle feature termination finish snpb 100% matte sn preheat/soak temperature minimum (t smin ) 100c 150c temperature maximum (t smax ) 150c 200c time (t s ) from t smin to t smax 60 C 120 seconds 60 C 120 seconds ramp-up rate (t l to t p ) 3c/second maximum 3c/second maximum liquidous temperature (t l ) 183c 217c time above liquidous (t l ) 60 C 150 seconds 60 C 150 seconds peak temperature (t p ) 235c 260c time within 5c of maximum peak temperature (t p ) 20 seconds maximum 30 seconds maximum ramp-down rate (t p to t l ) 6c/second maximum 6c/second maximum time 25c to peak temperature 6 minutes maximum 8 minutes maximum 2sxippxiqtivexyviwviivxsxligirxivsxlitegoekiqiewyvihsrxli getegmxsvshwyvegixlexmwegmrkythyvmrkewwiqpvis time te mp erature t smin 25 t smax t l t p maximum ramp up rate = 3oc/sec maximum ramp down rate = 6oc/sec t p t l t s 25oc to peak surface mount multilayer ceramic chip capacitors (smd mlccs) pulse discharge, high voltage, high temperature 200c c0g dielectric, 1,000 vdc C 3,500 vdc (industrial grade)
? kemet electronics corporation ? p.o. box 5928 ? greenville, sc 29606 ? 864-963-6300 ? www.kemet.com c10 35_c0g_pulse_smd ? 8/2/2016 9 table 4 C performance & reliability: test methods and conditions product qualifcation test plan reliability/environmental tests per milCstdC202//jesd22 load humidity 85c/85%rh and 200 vdc maximum, 1,000 hours low voltage humidity 85c/85%rh, 1.5v, 1,000 hours temperature cycling ?55c to +200c, 50 cycles thermal shock ?55c to +150c, 20 seconds transfer, 15 minute dwell, 300 cycles moisture resistance cycled temp/rh 0 v, 10 cycles at 24 hours each physical, mechanical & process tests per milCstd 202/jisCcC6429 resistance to solvents include aqueous wash chemical C okem clean or equivalent mechanical shock and vibration method 213: figure 1, condition f method 204: 5 gs for 20 minutes, 12 cycles resistance to soldering heat condition b, no per-heat of samples, single wave solder terminal strength force of 1.8 kg for 60 seconds board flex appendix 2, note: 3.0 mm (minimum) storage and handling ceramic chip capacitors should be stored in normal working environments. while the chips themselves are quite robust in other environments, solderability will be degraded by exposure to high temperatures, high humidity, corrosive atmospheres, and long term storage. in addition, packaging materials will be degraded by high temperatureCreels may soften or warp and tape peel force may increase. kemet recommends that maximum storage temperature not exceed 40oc and maximum storage humidity not exceed 70% relative humidity. temperature fuctuations should be minimized to avoid condensation on the parts and atmospheres should be free of chlorine and sulfur bearing compounds. for optimized solderability chip stock should be used promptly, preferably within 1.5 years of receipt. surface mount multilayer ceramic chip capacitors (smd mlccs) pulse discharge, high voltage, high temperature 200c c0g dielectric, 1,000 vdc C 3,500 vdc (industrial grade)
? kemet electronics corporation ? p.o. box 5928 ? greenville, sc 29606 ? 864-963-6300 ? www.kemet.com c10 35_c0g_pulse_smd ? 8/2/2016 10 construction detailed cross section barrier layer (ni) inner electrodes (ni) barrier layer (ni) inner electrodes (ni) dielectric material (cazro 3 ) dielectric material (cazro 3 ) termination finish (100% matte sn / snpb - 5% pb min) termination finish (100% matte sn / snpb - 5% pb min) end termination/ external electrode (cu) end termination/ external electrode (cu) capacitor marking (optional): laser marking option is not available on: ? c0g , ultra stable x8r and y5v dielectric devices ? eia 0 402 case size devices ? eia 0 603 case size devices with flexible termination option. ? kps c ommercial and automotive grade stacked devices. these capacitors are supplied unmarked only. packaging please contact kemet for details regarding available packaging options. surface mount multilayer ceramic chip capacitors (smd mlccs) pulse discharge, high voltage, high temperature 200c c0g dielectric, 1,000 vdc C 3,500 vdc (industrial grade)
? kemet electronics corporation ? p.o. box 5928 ? greenville, sc 29606 ? 864-963-6300 ? www.kemet.com c10 35_c0g_pulse_smd ? 8/2/2016 11 tape & reel packaging information kemet offers multilayer ceramic chip capacitors packaged in 8, 12, 16 and 24 mm tape on 7" and 13" reels in accordance with eia standard 481. this packaging system is compatible with all tape-fed automatic pick and place systems. see table 2 for details on reeling quantities for commercial chips. 8 mm, 12 mm or 16 mm carrier tape 178 mm (7.00") or 330 mm (13.00") anti-static reel embossed plastic* or punched paper carrier. embossment or punched cavity anti-static cover tape (.10 mm (.004") maximum thickness) chip and kps orientation in pocket (except 1825 commercial, and 1825 and 2225 militar y) *eia 01005, 0201, 0402 and 0603 case sizes available on punched paper carrier only. kemet ? bar code label sprocket holes table 5 C carrier tape conf guration, embossed plastic & punched paper (mm) eia case size tape size (w)* embossed plastic punched paper 7" reel 13" reel 7" reel 13" reel pitch (p 1 )* pitch (p 1 )* 01005 C 0402 8 2 2 0603 8 2/4 2/4 0805 8 4 4 4 4 1206 C 1210 8 4 4 4 4 1805 C 1808 12 4 4 1812 12 8 8 2824 16 12 12 3040 C 4540 24 16 16 kps 1210 12 8 8 kps 1812 & 2220 16 12 12 array 0508 & 0612 8 4 4 6ijivxs*mkyviwjsverh4 1 carrier tape reference locations. iivsiwsvsiviwisw new 2 mm pitch reel options* packaging ordering code (c-spec) packaging type/options c-3190 automotive grade 7" reel unmarked c-3191 automotive grade 13" reel unmarked c-7081 commercial grade 7" reel unmarked c-7082 commercial grade 13" reel unmarked qqtmxglviipsrpeempefpijsv)-%gewiwmi qqtmxglviipjsv)-%gewiwmiyrhivhiipstqirx benef ts of changing from 4 mm to 2 mm pitching spacing ? lower placement costs ? double the parts on each reel results in fewer reel changes and increased eff ciency ? fewer reels result in lower packaging, shipping and storage costs, reducing waste surface mount multilayer ceramic chip capacitors (smd mlccs) pulse discharge, high voltage, high temperature 200c c0g dielectric, 1,000 vdc C 3,500 vdc (industrial grade)
? kemet electronics corporation ? p.o. box 5928 ? greenville, sc 29606 ? 864-963-6300 ? www.kemet.com c10 35_c0g_pulse_smd ? 8/2/2016 12 figure 1 C embossed (plastic) carrier tape dimensions po t f w cent er line s of ca vity ao bo user direction of unre eling cover tape ko b 1 is for tape feeder reference only, including dra ft concentric abou t b o . t 2 ?d 1 ?do b 1 s 1 t 1 e 1 e 2 p 1 p 2 embossment for c avity size, see note 1 table 4 [10 pitches cumulative tolerance on tape 0.2 mm] table 6 C embossed (plastic) carrier tape dimensions metric will govern constant dimensions millimeters (inches) tape size d 0 e 1 p 0 p 2 r reference note 2 s 1 minimum note 3 t maximum t1 maximum 8 mm 1.5+0.10/?0.0 (0.059+0.004/?0.0) 1.750.10 (0.0690.004) 4.00.10 (0.1570.004) 2.00.05 (0.0790.002) 25.0 (0.984) 0.600 (0.024) 0.600 (0.024) 0.100 (0.004) 12 mm 30 (1.181) 16 mm 24 mm 1.5+0.10/?0.0 (0.059+0.004/?0.0) 1.750.10 (0.0690.004) 4.00.10 (0.1570.004) 2.00.10 (0.0780.003) 30 (1.181) 5 (0.196) 0.250 (0.009) 0.350 (0.013) variable dimensions millimeters (inches) tape size pitch e 2 minimum f p 1 t 2 maximum w maximum a 0 ,b 0 & k 0 8 mm single (4 mm) 6.25 (0.246) 3.50.05 (0.1380.002) 4.00.10 (0.1570.004) 2.5 (0.098) 8.3 (0.327) note 5 12 mm single (4 mm) & double (8 mm) 10.25 (0.404) 5.50.05 (0.2170.002) 8.00.10 (0.3150.004) 4.6 (0.181) 12.3 (0.484) 16 mm triple (12 mm) 14.25 (0.561) 7.5 0.05 (0.1380.002) 12.00.10 (0.1570.004) 4.6 (0.181) 16.3 (0.642) 24 mm 16 mm 22.25 (0.875) 11.50.10 (0.4520.003) 16.00.10 (0.6290.004) 3 (0.118) 24.3 (0.956) 8liiqfswwqirxlspipsgexmsrwleppfiqiewyvihjvsqxliwtvsgoixlspigsrxvsppmrkxlipsgexmsrsjxliiqfswwqirx(mqirwmsrwsjiqfswwqirx location and hole location shall be applied independent of each other. iisvsssiwwwwvssiwiivi 3. if s 1 ivisiisvisvsivisivsiviwii)vvvwis 1 iwswviiviiiwssviiiivivis iii wwvvsissiwiivi (a) the component does not protrude above the top surface of the carrier tape. issiivisivsiivvissiviwvsivissiviwiivisi vsssissiwissviwsviwwiivi ivsiisissiwviwvissviissviwii vi isviviwvs viiwvisisiisssisi wiii)vsvwvwvissviviwiviviiw surface mount multilayer ceramic chip capacitors (smd mlccs) pulse discharge, high voltage, high temperature 200c c0g dielectric, 1,000 vdc C 3,500 vdc (industrial grade)
? kemet electronics corporation ? p.o. box 5928 ? greenville, sc 29606 ? 864-963-6300 ? www.kemet.com c10 35_c0g_pulse_smd ? 8/2/2016 13 figure 2 C punched (paper) carrier tape dimensions user direct ion of unr ee li ng top cover t ape t center li nes o f cavity p 1 ?do po e 1 f e 2 w g a 0 b 0 cavity size, see n ote 1, tab le 7 bottom cover tape t 1 t 1 bottom cover tape [10 pitc he s cumulative tolerance on tape 0.2 mm] table 7 C punched (paper) carrier tape dimensions metric will govern constant dimensions millimeters (inches) tape size d 0 e 1 p 0 p 2 t 1 maximum g minimum r reference note 2 8 mm 1.5+0.10/?0.0 (0.059+0.004/?0.0) 1.750.10 (0.0690.004) 4.00.10 (0.1570.004) 2.00.05 (0.0790.002) 0.10 (0.004) maximum 0.75 (0.030) 2 (0.984) variable dimensions millimeters (inches) tape size pitch e2 minimum f p 1 t maximum w maximum a 0 b 0 8 mm half (2 mm) 6.25 (0.246) 3.50.05 (0.1380.002) 2.00.05 (0.0790.002) 1.1 (0.098) 8.3 (0.327) note 1 8 mm single (4 mm) 4.00.10 (0.1570.004) 8.3 (0.327) 8ligemxhirihf% & erh8wleppwyvvsyrhxligsqtsrirxmxlwyjgmirxgpievergixlex exligsqtsrirxhsiwrsxtvsxvyhifisrhimxlivwyvjegisjxligevvmivxeti fxligsqtsrirxgerfiviqsihjvsqxligemxmreivxmgephmvigxmsrmxlsyxqiglermgepviwxvmgxmsrejxivxlixstgsivxetilewfiirviqsih gvsxexmsrsjxligsqtsrirxmwpmqmxihxsqqemqyqwii*mkyvi hpexivepqsiqirxsjxligsqtsrirxmwviwxvmgxihxsqqqemqyqwii*mkyvi iwii%hhirhyqmr)-%7xerhevhjsvwxerhevhwvipexmrkxsqsvitvigmwixetmrkviuymviqirxw 8lixetimxlsvmxlsyxgsqtsrirxwwlepptewwevsyrh6mxlsyxheqekiwii*mkyvi surface mount multilayer ceramic chip capacitors (smd mlccs) pulse discharge, high voltage, high temperature 200c c0g dielectric, 1,000 vdc C 3,500 vdc (industrial grade)
? kemet electronics corporation ? p.o. box 5928 ? greenville, sc 29606 ? 864-963-6300 ? www.kemet.com c10 35_c0g_pulse_smd ? 8/2/2016 14 packaging information performance notes 1. cover tape break force: 1.0 kg minimum. 2. cover tape peel strength: the total peel strength of the cover tape from the carrier tape shall be: tape width peel strength 8 mm 0.1 to 1.0 newton (10 to 100 gf) 12 and 16 mm 0.1 to 1.3 newton (10 to 130 gf) 24 mm 0.1 to 1.6 newton (10 to 160 gf) the direction of the pull shall be opposite the direction of the carrier tape travel. the pull angle of the carrier tape shall be 165 to 180 from the plane of the carrier tape. during peeling, the carrier and/or cover tape shall be pulled at a velocity of 30010 mm/minute. 3. labeling: bar code labeling (standard or custom) shall be on the side of the reel opposite the sprocket holes. 6ijivxs)-% 7xerhevhwerh . figure 3 C maximum component rotation ao bo t s max imum c ompon en t rota ti on t op view maxi mum co mponent rotat ion s id e view tape m ax imum width (mm) r otat io n ( t ) 8,12 20 16 ? 200 10 tap e m aximum wid th ( mm) ro tat ion ( s ) 8,12 20 16 ? 56 10 72 ? 200 5 typical pocke t center line typical com po nent centerline figure 4 C maximum lateral movement 0.5 mm maxi mum 0.5 mm maxi mum 8 mm & 1 2 mm tap e 1.0 mm maxi mum 1.0 mm maxi mum 1 6 mm tape figure 5 C bending radius r r b en ding radius e mbo sse d carrier p unc hed ca rrier surface mount multilayer ceramic chip capacitors (smd mlccs) pulse discharge, high voltage, high temperature 200c c0g dielectric, 1,000 vdc C 3,500 vdc (industrial grade)
? kemet electronics corporation ? p.o. box 5928 ? greenville, sc 29606 ? 864-963-6300 ? www.kemet.com c10 35_c0g_pulse_smd ? 8/2/2016 15 figure 6 C reel dimensions a d (see note) full radi us, see note b (see note) access hole at slot location (? 40 mm minimum) if present, tape slot in core for t ap e start: 2.5 mm minimum width x 10.0 mm minimum depth w3 (includes flange distortion at outer edge) w2 (m ea sured at hu b) w1 (m ea sured at hu b) c (arbor hole diameter) note: drive spokes optional; if used, dimensions b and d shall apply. n table 8 C reel dimensions metric will govern constant dimensions millimeters (inches) tape size a b minimum c d minimum 8 mm 1780.20 (7.0080.008) or 3300.20 (13.0000.008) 1.5 (0.059) 13.0+0.5/?0.2 (0.521+0.02/?0.008) 20.2 (0.795) 12 mm 16 mm 24 mm 1.2 (0.047) 13.0 + ?0.2 (0.521 + ?0.008) variable dimensions millimeters (inches) tape size n minimum w 1 w 2 maximum w 3 8 mm 50 (1.969) 8.4+1.5/?0.0 (0.331+0.059/?0.0) 12.4+2.0/?0.0 (0.488+0.078/?0.0) 16.4+2.0/?0.0 (0.646+0.078/?0.0) 25+1.0/?0.0 (0.984+0.039/?0.0) 27.4+1.0/?1.0 (1.078+0.039/?0.039) surface mount multilayer ceramic chip capacitors (smd mlccs) pulse discharge, high voltage, high temperature 200c c0g dielectric, 1,000 vdc C 3,500 vdc (industrial grade)
? kemet electronics corporation ? p.o. box 5928 ? greenville, sc 29606 ? 864-963-6300 ? www.kemet.com c10 35_c0g_pulse_smd ? 8/2/2016 16 figure 7 C tape leader & trailer dimensions trailer 16 0 mm minimum carrier t ape end start rou nd sp rock et holes el ongated spro ck et holes ( 32 mm tape and wi de r) t op co ve r t ape top c ove r t ape p unche d carrier 8 mm & 12 mm only e mboss ed carrier components 100 mm minimum leader 400 mm minimum figure 8 C maximum camber carrier tape round sprocket holes 1 mm ma ximum , either direction straight edge 250 mm elongated sprocket holes (32 mm & wider ta pe s) surface mount multilayer ceramic chip capacitors (smd mlccs) pulse discharge, high voltage, high temperature 200c c0g dielectric, 1,000 vdc C 3,500 vdc (industrial grade)
? kemet electronics corporation ? p.o. box 5928 ? greenville, sc 29606 ? 864-963-6300 ? www.kemet.com c10 35_c0g_pulse_smd ? 8/2/2016 17 kemet electronic corporation sales off ces for a complete list of our global sales off ces, please visit www.kemet.com/sales. disclaimer all product specif cations, statements, information and data (collectively, the information) in this datasheet are subject to change. the customer is responsible for checking and verifying the extent to which the information contained in this publication is applicable to an order at the time the order is placed. all information given herein is believed to be accurate and reliable, but it is presented without guarantee, warranty, or responsibility of any kind, expressed or implied. statements of suitability for certain applications are based on kemet electronics corporations (kemet) knowledge of typical operating conditions for such applications, but are not intended to constitute C and kemet specif cally disclaims C any warranty concerning suitability for a specif c customer application or use. the information is intended for use only by customers who have the requisite experience and capability to determine the correct products for their application. any technical advice inferred from this information or otherwise provided by kemet with reference to the use of kemets products is given gratis, and kemet assumes no obligation or liability for the advice given or results obtained. although kemet designs and manufactures its products to the most stringent quality and safety standards, given the current state of the art, isolated component failures may still occur. accordingly, customer applications which require a high degree of reliability or safety should employ suitable designs or other safeguards (such as installation of protective circuitry or redundancies) in order to ensure that the failure of an electrical component does not result in a risk of personal injury or property damage. although all productCrelated warnings, cautions and notes must be observed, the customer should not assume that all safety measures are indicted or that other measures may not be required. kemet is a registered trademark of kemet electronics corporation. surface mount multilayer ceramic chip capacitors (smd mlccs) pulse discharge, high voltage, high temperature 200c c0g dielectric, 1,000 vdc C 3,500 vdc (industrial grade)

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